NASM 2.05 based x86 Instruction Reference
=========================================
Copyright 1996-2009 the NASM Authors - All rights reserved. NASM is now
licensed under the 2-clause BSD license, also known as the simplified BSD
license.
This document has been compiled on 2020-04-08.
============ Table Of Contents ============
1: License
A: x86 Instruction Reference
A.1 Key to Operand Specifications
A.2 Key to Opcode Descriptions
A.2.1 Register Values
A.2.2 Condition Codes
A.2.3 SSE Condition Predicates
A.2.4 Status Flags
A.2.5 Control Flags
A.2.5.1 IF - Interrupt flag
A.2.5.2 DF - Direction flag
A.2.5.3 TF - Trace flag
A.2.6 Effective Address Encoding: ModR/M and SIB
A.2.7 Register Extensions: The REX Prefix
A.3 Key to Instruction Flags
A.4 Emulator notes
A.4.1 Common corner cases
A.4.2 Emulator call encodings
A.5 x86 Instruction Set
A.5.1 AAA, AAS, AAM, AAD: ASCII Adjustments
A.5.2 ADC: Add with Carry
A.5.3 ADD: Add Integers
A.5.4 ADDPD: ADD Packed Double-Precision FP Values
A.5.5 ADDPS: ADD Packed Single-Precision FP Values
A.5.6 ADDSD: ADD Scalar Double-Precision FP Values
A.5.7 ADDSS: ADD Scalar Single-Precision FP Values
A.5.8 AND: Bitwise AND
A.5.9 ANDNPD: Bitwise Logical AND NOT of Packed Double-Precision FP Values
A.5.10 ANDNPS: Bitwise Logical AND NOT of Packed Single-Precision FP Values
A.5.11 ANDPD: Bitwise Logical AND For Single FP
A.5.12 ANDPS: Bitwise Logical AND For Single FP
A.5.13 ARPL: Adjust RPL Field of Selector
A.5.14 BOUND: Check Array Index against Bounds
A.5.15 BSF, BSR: Bit Scan
A.5.16 BSWAP: Byte Swap
A.5.17 BT, BTC, BTR, BTS: Bit Test
A.5.18 CALL: Call Subroutine
A.5.19 CBW, CWD, CDQ, CWDE: Sign Extensions
A.5.20 CLC, CLD, CLI, CLTS: Clear Flags
A.5.21 CLFLUSH: Flush Cache Line
A.5.22 CMC: Complement Carry Flag
A.5.23 CMOVcc: Conditional Move
A.5.24 CMP: Compare Integers
A.5.25 CMPccPD: Packed Double-Precision FP Compare
A.5.26 CMPccPS: Packed Single-Precision FP Compare
A.5.27 CMPSB, CMPSW, CMPSD: Compare Strings
A.5.27.1 Pseudo-code examples
A.5.28 CMPccSD: Scalar Double-Precision FP Compare
A.5.29 CMPccSS: Scalar Single-Precision FP Compare
A.5.30 CMPXCHG, CMPXCHG486: Compare and Exchange
A.5.31 CMPXCHG8B: Compare and Exchange Eight Bytes
A.5.32 COMISD: Scalar Ordered Double-Precision FP Compare and Set EFLAGS
A.5.33 COMISS: Scalar Ordered Single-Precision FP Compare and Set EFLAGS
A.5.34 CPUID: Get CPU Identification Code
A.5.35 CVTDQ2PD: Packed Signed INT32 to Packed Double-Precision FP
A.5.36 CVTDQ2PS: Packed Signed INT32 to Packed Single-Precision FP
A.5.37 CVTPD2DQ: Packed Double-Precision FP to Packed Signed INT32
A.5.38 CVTPD2PI: Packed Double-Precision FP to Packed Signed INT32
A.5.39 CVTPD2PS: Packed Double-Precision FP to Packed Single-Precision FP
A.5.40 CVTPI2PD: Packed Signed INT32 to Packed Double-Precision FP
A.5.41 CVTPI2PS: Packed Signed INT32 to Packed Single-FP Conversion
A.5.42 CVTPS2DQ: Packed Single-Precision FP to Packed Signed INT32
A.5.43 CVTPS2PD: Packed Single-Precision FP to Packed Double-Precision FP
A.5.44 CVTPS2PI: Packed Single-Precision FP to Packed Signed INT32
A.5.45 CVTSD2SI: Scalar Double-Precision FP to Signed INT32 Conversion
A.5.46 CVTSD2SS: Scalar Double-Precision FP to Scalar Single-Precision FP
A.5.47 CVTSI2SD: Signed INT32 to Scalar Double-Precision FP Conversion
A.5.48 CVTSI2SS: Signed INT32 to Scalar Single-Precision FP Conversion
A.5.49 CVTSS2SD: Scalar Single-Precision FP to Scalar Double-Precision FP
A.5.50 CVTSS2SI: Scalar Single-Precision FP to Signed INT32 Conversion
A.5.51 CVTTPD2DQ: Packed Double-Precision FP to Packed Signed INT32
A.5.52 CVTTPD2PI: Packed Double-Precision FP to Packed Signed INT32
A.5.53 CVTTPS2DQ: Packed Single-Precision FP to Packed Signed INT32
A.5.54 CVTTPS2PI: Packed Single-Precision FP to Packed Signed INT32
A.5.55 CVTTSD2SI: Scalar Double-Precision FP to Signed INT32 Conversion with
A.5.56 CVTTSS2SI: Scalar Single-Precision FP to Signed INT32 Conversion with
A.5.57 DAA, DAS: Decimal Adjustments
A.5.58 DEC: Decrement Integer
A.5.59 DIV: Unsigned Integer Divide
A.5.60 DIVPD: Packed Double-Precision FP Divide
A.5.61 DIVPS: Packed Single-Precision FP Divide
A.5.62 DIVSD: Scalar Double-Precision FP Divide
A.5.63 DIVSS: Scalar Single-Precision FP Divide
A.5.64 EMMS: Empty MMX State
A.5.65 ENTER: Create Stack Frame
A.5.66 F2XM1: Calculate 2**X-1
A.5.67 FABS: Floating-Point Absolute Value
A.5.68 FADD, FADDP: Floating-Point Addition
A.5.69 FBLD, FBSTP: BCD Floating-Point Load and Store
A.5.70 FCHS: Floating-Point Change Sign
A.5.71 FCLEX, FNCLEX: Clear Floating-Point Exceptions
A.5.72 FCMOVcc: Floating-Point Conditional Move
A.5.73 FCOM, FCOMP, FCOMPP, FCOMI, FCOMIP: Floating-Point Compare
A.5.74 FCOS: Cosine
A.5.75 FDECSTP: Decrement Floating-Point Stack Pointer
A.5.76 FxDISI, FxENI: Disable and Enable Floating-Point Interrupts
A.5.77 FDIV, FDIVP, FDIVR, FDIVRP: Floating-Point Division
A.5.78 FEMMS: Faster Enter/Exit of the MMX or floating-point state
A.5.79 FFREE: Flag Floating-Point Register as Unused
A.5.80 FIADD: Floating-Point/Integer Addition
A.5.81 FICOM, FICOMP: Floating-Point/Integer Compare
A.5.82 FIDIV, FIDIVR: Floating-Point/Integer Division
A.5.83 FILD, FIST, FISTP: Floating-Point/Integer Conversion
A.5.84 FIMUL: Floating-Point/Integer Multiplication
A.5.85 FINCSTP: Increment Floating-Point Stack Pointer
A.5.86 FINIT, FNINIT: initialize Floating-Point Unit
A.5.87 FISUB: Floating-Point/Integer Subtraction
A.5.88 FLD: Floating-Point Load
A.5.89 FLDxx: Floating-Point Load Constants
A.5.90 FLDCW: Load Floating-Point Control Word
A.5.91 FLDENV: Load Floating-Point Environment
A.5.92 FMUL, FMULP: Floating-Point Multiply
A.5.93 FNOP: Floating-Point No Operation
A.5.94 FPATAN, FPTAN: Arctangent and Tangent
A.5.95 FPREM, FPREM1: Floating-Point Partial Remainder
A.5.96 FRNDINT: Floating-Point Round to Integer
A.5.97 FSAVE, FRSTOR: Save/Restore Floating-Point State
A.5.98 FSCALE: Scale Floating-Point Value by Power of Two
A.5.99 FSETPM: Set Protected Mode
A.5.100 FSIN, FSINCOS: Sine and Cosine
A.5.101 FSQRT: Floating-Point Square Root
A.5.102 FST, FSTP: Floating-Point Store
A.5.103 FSTCW: Store Floating-Point Control Word
A.5.104 FSTENV: Store Floating-Point Environment
A.5.105 FSTSW: Store Floating-Point Status Word
A.5.106 FSUB, FSUBP, FSUBR, FSUBRP: Floating-Point Subtract
A.5.107 FTST: Test ST0 Against Zero
A.5.108 FUCOMxx: Floating-Point Unordered Compare
A.5.109 FXAM: Examine Class of Value in ST0
A.5.110 FXCH: Floating-Point Exchange
A.5.111 FXRSTOR: Restore FP, MMX and SSE State
A.5.112 FXSAVE: Store FP, MMX and SSE State
A.5.113 FXTRACT: Extract Exponent and Significand
A.5.114 FYL2X, FYL2XP1: Compute Y times Log2(X) or Log2(X+1)
A.5.115 HLT: Halt Processor
A.5.116 IBTS: Insert Bit String
A.5.117 IDIV: Signed Integer Divide
A.5.118 IMUL: Signed Integer Multiply
A.5.119 IN: Input from I/O Port
A.5.120 INC: Increment Integer
A.5.121 INSB, INSW, INSD: Input String from I/O Port
A.5.121.1 Pseudo-code examples
A.5.122 INT: Software Interrupt
A.5.123 INT3, INT1, ICEBP, INT01: Breakpoints
A.5.124 INTO: Interrupt if Overflow
A.5.125 INVD: Invalidate Internal Caches
A.5.126 INVLPG: Invalidate TLB Entry
A.5.127 IRET, IRETW, IRETD: Return from Interrupt
A.5.128 Jcc: Conditional Branch
A.5.129 JCXZ, JECXZ: Jump if CX/ECX Zero
A.5.130 JMP: Jump
A.5.131 LAHF: Load AH from Flags
A.5.132 LAR: Load Access Rights
A.5.133 LDMXCSR: Load Streaming SIMD Extension Control/Status
A.5.134 LDS, LES, LFS, LGS, LSS: Load Far Pointer
A.5.135 LEA: Load Effective Address
A.5.136 LEAVE: Destroy Stack Frame
A.5.137 LFENCE: Load Fence
A.5.138 LGDT, LIDT, LLDT: Load Descriptor Tables
A.5.139 LMSW: Load/Store Machine Status Word
A.5.140 LOADALL, LOADALL286: Load Processor State
A.5.141 LODSB, LODSW, LODSD: Load from String
A.5.141.1 Pseudo-code examples
A.5.142 LOOP, LOOPE, LOOPZ, LOOPNE, LOOPNZ: Loop with Counter
A.5.143 LSL: Load Segment Limit
A.5.144 LTR: Load Task Register
A.5.145 MASKMOVDQU: Byte Mask Write
A.5.146 MASKMOVQ: Byte Mask Write
A.5.147 MAXPD: Return Packed Double-Precision FP Maximum
A.5.148 MAXPS: Return Packed Single-Precision FP Maximum
A.5.149 MAXSD: Return Scalar Double-Precision FP Maximum
A.5.150 MAXSS: Return Scalar Single-Precision FP Maximum
A.5.151 MFENCE: Memory Fence
A.5.152 MINPD: Return Packed Double-Precision FP Minimum
A.5.153 MINPS: Return Packed Single-Precision FP Minimum
A.5.154 MINSD: Return Scalar Double-Precision FP Minimum
A.5.155 MINSS: Return Scalar Single-Precision FP Minimum
A.5.156 MOV: Move Data
A.5.157 MOVAPD: Move Aligned Packed Double-Precision FP Values
A.5.158 MOVAPS: Move Aligned Packed Single-Precision FP Values
A.5.159 MOVD: Move Doubleword to/from MMX Register
A.5.160 MOVDQ2Q: Move Quadword from XMM to MMX register.
A.5.161 MOVDQA: Move Aligned Double Quadword
A.5.162 MOVDQU: Move Unaligned Double Quadword
A.5.163 MOVHLPS: Move Packed Single-Precision FP High to Low
A.5.164 MOVHPD: Move High Packed Double-Precision FP
A.5.165 MOVHPS: Move High Packed Single-Precision FP
A.5.166 MOVLHPS: Move Packed Single-Precision FP Low to High
A.5.167 MOVLPD: Move Low Packed Double-Precision FP
A.5.168 MOVLPS: Move Low Packed Single-Precision FP
A.5.169 MOVMSKPD: Extract Packed Double-Precision FP Sign Mask
A.5.170 MOVMSKPS: Extract Packed Single-Precision FP Sign Mask
A.5.171 MOVNTDQ: Move Double Quadword Non Temporal
A.5.172 MOVNTI: Move Doubleword Non Temporal
A.5.173 MOVNTPD: Move Aligned Four Packed Single-Precision FP Values Non
A.5.174 MOVNTPS: Move Aligned Four Packed Single-Precision FP Values Non
A.5.175 MOVNTQ: Move Quadword Non Temporal
A.5.176 MOVQ: Move Quadword to/from MMX Register
A.5.177 MOVQ2DQ: Move Quadword from MMX to XMM register.
A.5.178 MOVSB, MOVSW, MOVSD: Move String
A.5.178.1 Pseudo-code examples
A.5.179 MOVSD: Move Scalar Double-Precision FP Value
A.5.180 MOVSS: Move Scalar Single-Precision FP Value
A.5.181 MOVSX, MOVZX: Move Data with Sign or Zero Extend
A.5.182 MOVUPD: Move Unaligned Packed Double-Precision FP Values
A.5.183 MOVUPS: Move Unaligned Packed Single-Precision FP Values
A.5.184 MUL: Unsigned Integer Multiply
A.5.185 MULPD: Packed Single-FP Multiply
A.5.186 MULPS: Packed Single-FP Multiply
A.5.187 MULSD: Scalar Single-FP Multiply
A.5.188 MULSS: Scalar Single-FP Multiply
A.5.189 NEG, NOT: Two's and Ones' Complement
A.5.190 NOP: No Operation
A.5.191 OR: Bitwise OR
A.5.192 ORPD: Bit-wise Logical OR of Double-Precision FP Data
A.5.193 ORPS: Bit-wise Logical OR of Single-Precision FP Data
A.5.194 OUT: Output Data to I/O Port
A.5.195 OUTSB, OUTSW, OUTSD: Output String to I/O Port
A.5.195.1 Pseudo-code examples
A.5.196 PACKSSDW, PACKSSWB, PACKUSWB: Pack Data
A.5.197 PADDB, PADDW, PADDD: Add Packed Integers
A.5.198 PADDQ: Add Packed Quadword Integers
A.5.199 PADDSB, PADDSW: Add Packed Signed Integers With Saturation
A.5.200 PADDSIW: MMX Packed Addition to Implicit Destination
A.5.201 PADDUSB, PADDUSW: Add Packed Unsigned Integers With Saturation
A.5.202 PAND, PANDN: MMX Bitwise AND and AND-NOT
A.5.203 PAUSE: Spin Loop Hint
A.5.204 PAVEB: MMX Packed Average
A.5.205 PAVGB PAVGW: Average Packed Integers
A.5.206 PAVGUSB: Average of unsigned packed 8-bit values
A.5.207 PCMPxx: Compare Packed Integers.
A.5.208 PDISTIB: MMX Packed Distance and Accumulate with Implied Register
A.5.209 PEXTRW: Extract Word
A.5.210 PF2ID: Packed Single-Precision FP to Integer Convert
A.5.211 PF2IW: Packed Single-Precision FP to Integer Word Convert
A.5.212 PFACC: Packed Single-Precision FP Accumulate
A.5.213 PFADD: Packed Single-Precision FP Addition
A.5.214 PFCMPxx: Packed Single-Precision FP Compare
A.5.215 PFMAX: Packed Single-Precision FP Maximum
A.5.216 PFMIN: Packed Single-Precision FP Minimum
A.5.217 PFMUL: Packed Single-Precision FP Multiply
A.5.218 PFNACC: Packed Single-Precision FP Negative Accumulate
A.5.219 PFPNACC: Packed Single-Precision FP Mixed Accumulate
A.5.220 PFRCP: Packed Single-Precision FP Reciprocal Approximation
A.5.221 PFRCPIT1: Packed Single-Precision FP Reciprocal, First Iteration
A.5.222 PFRCPIT2: Packed Single-Precision FP Reciprocal/ Reciprocal Square
A.5.223 PFRSQIT1: Packed Single-Precision FP Reciprocal Square Root, First
A.5.224 PFRSQRT: Packed Single-Precision FP Reciprocal Square Root
A.5.225 PFSUB: Packed Single-Precision FP Subtract
A.5.226 PFSUBR: Packed Single-Precision FP Reverse Subtract
A.5.227 PI2FD: Packed Doubleword Integer to Single-Precision FP Convert
A.5.228 PI2FW: Packed Word Integer to Single-Precision FP Convert
A.5.229 PINSRW: Insert Word
A.5.230 PMACHRIW: Packed Multiply and Accumulate with Rounding
A.5.231 PMADDWD: MMX Packed Multiply and Add
A.5.232 PMAGW: MMX Packed Magnitude
A.5.233 PMAXSW: Packed Signed Integer Word Maximum
A.5.234 PMAXUB: Packed Unsigned Integer Byte Maximum
A.5.235 PMINSW: Packed Signed Integer Word Minimum
A.5.236 PMINUB: Packed Unsigned Integer Byte Minimum
A.5.237 PMOVMSKB: Move Byte Mask To Integer
A.5.238 PMULHRWC, PMULHRIW: Multiply Packed 16-bit Integers With Rounding,
A.5.239 PMULHRWA: Multiply Packed 16-bit Integers With Rounding, and Store
A.5.240 PMULHUW: Multiply Packed 16-bit Integers, and Store High Word
A.5.241 PMULHW, PMULLW: Multiply Packed 16-bit Integers, and Store
A.5.242 PMULUDQ: Multiply Packed Unsigned 32-bit Integers, and Store.
A.5.243 PMVccZB: MMX Packed Conditional Move
A.5.244 POP: Pop Data from Stack
A.5.245 POPAx: Pop All General-Purpose Registers
A.5.246 POPFx: Pop Flags Register
A.5.247 POR: MMX Bitwise OR
A.5.248 PREFETCH: Prefetch Data Into Caches
A.5.249 PREFETCHh: Prefetch Data Into Caches
A.5.250 PSADBW: Packed Sum of Absolute Differences
A.5.251 PSHUFD: Shuffle Packed Doublewords
A.5.252 PSHUFHW: Shuffle Packed High Words
A.5.253 PSHUFLW: Shuffle Packed Low Words
A.5.254 PSHUFW: Shuffle Packed Words
A.5.255 PSLLx: Packed Data Bit Shift Left Logical
A.5.256 PSRAx: Packed Data Bit Shift Right Arithmetic
A.5.257 PSRLx: Packed Data Bit Shift Right Logical
A.5.258 PSUBx: Subtract Packed Integers
A.5.259 PSUBSxx, PSUBUSx: Subtract Packed Integers With Saturation
A.5.260 PSUBSIW: MMX Packed Subtract with Saturation to Implied Destination
A.5.261 PSWAPD: Swap Packed Data
A.5.262 PUNPCKxxx: Unpack and Interleave Data
A.5.263 PUSH: Push Data on Stack
A.5.264 PUSHAx: Push All General-Purpose Registers
A.5.265 PUSHFx: Push Flags Register
A.5.266 PXOR: MMX Bitwise XOR
A.5.267 RCL, RCR: Bitwise Rotate through Carry Bit
A.5.268 RCPPS: Packed Single-Precision FP Reciprocal
A.5.269 RCPSS: Scalar Single-Precision FP Reciprocal
A.5.270 RDMSR: Read Model-Specific Registers
A.5.271 RDPMC: Read Performance-Monitoring Counters
A.5.272 RDSHR: Read SMM Header Pointer Register
A.5.273 RDTSC: Read Time-Stamp Counter
A.5.274 RET, RETF, RETN: Return from Procedure Call
A.5.275 ROL, ROR: Bitwise Rotate
A.5.276 RSDC: Restore Segment Register and Descriptor
A.5.277 RSLDT: Restore Segment Register and Descriptor
A.5.278 RSM: Resume from System-Management Mode
A.5.279 RSQRTPS: Packed Single-Precision FP Square Root Reciprocal
A.5.280 RSQRTSS: Scalar Single-Precision FP Square Root Reciprocal
A.5.281 RSTS: Restore TSR and Descriptor
A.5.282 SAHF: Store AH to Flags
A.5.283 SAL, SAR: Bitwise Arithmetic Shifts
A.5.284 SALC: Set AL from Carry Flag
A.5.285 SBB: Subtract with Borrow
A.5.286 SCASB, SCASW, SCASD: Scan String
A.5.286.1 Pseudo-code examples
A.5.287 SETcc: Set Register from Condition
A.5.288 SFENCE: Store Fence
A.5.289 SGDT, SIDT, SLDT: Store Descriptor Table Pointers
A.5.290 SHL, SHR: Bitwise Logical Shifts
A.5.291 SHLD, SHRD: Bitwise Double-Precision Shifts
A.5.292 SHUFPD: Shuffle Packed Double-Precision FP Values
A.5.293 SHUFPS: Shuffle Packed Single-Precision FP Values
A.5.294 SMI: System Management Interrupt
A.5.295 SMINT, SMINTOLD: Software SMM Entry (CYRIX)
A.5.296 SMSW: Store Machine Status Word
A.5.297 SQRTPD: Packed Double-Precision FP Square Root
A.5.298 SQRTPS: Packed Single-Precision FP Square Root
A.5.299 SQRTSD: Scalar Double-Precision FP Square Root
A.5.300 SQRTSS: Scalar Single-Precision FP Square Root
A.5.301 STC, STD, STI: Set Flags
A.5.302 STMXCSR: Store Streaming SIMD Extension Control/Status
A.5.303 STOSB, STOSW, STOSD: Store Byte to String
A.5.303.1 Pseudo-code examples
A.5.304 STR: Store Task Register
A.5.305 SUB: Subtract Integers
A.5.306 SUBPD: Packed Double-Precision FP Subtract
A.5.307 SUBPS: Packed Single-Precision FP Subtract
A.5.308 SUBSD: Scalar Single-FP Subtract
A.5.309 SUBSS: Scalar Single-FP Subtract
A.5.310 SVDC: Save Segment Register and Descriptor
A.5.311 SVLDT: Save LDTR and Descriptor
A.5.312 SVTS: Save TSR and Descriptor
A.5.313 SYSCALL: Call Operating System
A.5.314 SYSENTER: Fast System Call
A.5.315 SYSEXIT: Fast Return From System Call
A.5.316 SYSRET: Return From Operating System
A.5.317 TEST: Test Bits (notional bitwise AND)
A.5.318 UCOMISD: Unordered Scalar Double-Precision FP compare and set EFLAGS
A.5.319 UCOMISS: Unordered Scalar Single-Precision FP compare and set EFLAGS
A.5.320 UD0, UD1, UD2: Undefined Instruction
A.5.321 UMOV: User Move Data
A.5.322 UNPCKHPD: Unpack and Interleave High Packed Double-Precision FP
A.5.323 UNPCKHPS: Unpack and Interleave High Packed Single-Precision FP
A.5.324 UNPCKLPD: Unpack and Interleave Low Packed Double-Precision FP Data
A.5.325 UNPCKLPS: Unpack and Interleave Low Packed Single-Precision FP Data
A.5.326 VERR, VERW: Verify Segment Readability/Writability
A.5.327 WAIT: Wait for Floating-Point Processor
A.5.328 WBINVD: Write Back and Invalidate Cache
A.5.329 WRMSR: Write Model-Specific Registers
A.5.330 WRSHR: Write SMM Header Pointer Register
A.5.331 XADD: Exchange and Add
A.5.332 XBTS: Extract Bit String
A.5.333 XCHG: Exchange
A.5.334 XLATB: Translate Byte in Lookup Table
A.5.335 XOR: Bitwise Exclusive OR
A.5.336 XORPD: Bitwise Logical XOR of Double-Precision FP Values
A.5.337 XORPS: Bitwise Logical XOR of Single-Precision FP Values
Source Control Revision ID