A.5.335 XOR: Bitwise Exclusive OR
XOR r/m8,reg8 ; 30 /r [8086]
XOR r/m16,reg16 ; o16 31 /r [8086]
XOR r/m32,reg32 ; o32 31 /r [386]
XOR reg8,r/m8 ; 32 /r [8086]
XOR reg16,r/m16 ; o16 33 /r [8086]
XOR reg32,r/m32 ; o32 33 /r [386]
XOR r/m8,imm8 ; 80 /6 ib [8086]
XOR r/m16,imm16 ; o16 81 /6 iw [8086]
XOR r/m32,imm32 ; o32 81 /6 id [386]
XOR r/m16,imm8 ; o16 83 /6 ib [8086]
XOR r/m32,imm8 ; o32 83 /6 ib [386]
XOR AL,imm8 ; 34 ib [8086]
XOR AX,imm16 ; o16 35 iw [8086]
XOR EAX,imm32 ; o32 35 id [386]
XOR performs a bitwise XOR operation between its two operands (i.e. each
bit of the result is 1 if and only if exactly one of the corresponding
bits of the two inputs was 1), and stores the result in the destination
(first) operand.
In the forms with an 8-bit immediate second operand and a longer first
operand, the second operand is considered to be signed, and is sign-
extended to the length of the first operand. The BYTE qualifier can be
used to force NASM to generate this form of the instruction. Recent
versions of NASM automatically optimise to this form if the immediate
operand's value is known during the assembling of that instruction, and
fits in the range of a signed byte. The longer variant can then still be
forced using the STRICT WORD or STRICT DWORD qualifier.
The Carry Flag is cleared by XOR. The Zero Flag is set according to
whether the result is zero.
The MMX instruction PXOR (see section A.5.266) performs the same
operation on the 64-bit MMX registers.