NASM 2.05 based x86 Instruction Reference[ch346]
A.5.320 UD0, UD1, UD2: Undefined Instruction UD0 ; 0F FF [186,UNDOC] UD1 ; 0F B9 [186,UNDOC] UD2 ; 0F 0B [186] UDx can be used to generate an invalid opcode exception, for testing purposes. UD0 is specifically documented by AMD as being reserved for this purpose. UD1 is documented by Intel as being available for this purpose. UD2 is specifically documented by Intel as being reserved for this purpose. Intel document this as the preferred method of generating an invalid opcode exception. All these opcodes can be used to generate invalid opcode exceptions on all currently available processors.