A.5.296 SMSW: Store Machine Status Word
SMSW r/m16 ; 0F 01 /4 [286,PRIV]
SMSW stores the bottom half of the CR0 control register (or the Machine
Status Word, on 286 processors) into the destination operand. See also
LMSW (section A.5.139).
For 32-bit code, this would store all of CR0 in the specified register
(or the bottom 16 bits if the destination is a memory location), without
needing an operand size override byte.