A.5.257 PSRLx: Packed Data Bit Shift Right Logical
PSRLW mm1,mm2/m64 ; 0F D1 /r [PENT,MMX]
PSRLW mm,imm8 ; 0F 71 /2 ib [PENT,MMX]
PSRLW xmm1,xmm2/m128 ; 66 0F D1 /r [WILLAMETTE,SSE2]
PSRLW xmm,imm8 ; 66 0F 71 /2 ib [WILLAMETTE,SSE2]
PSRLD mm1,mm2/m64 ; 0F D2 /r [PENT,MMX]
PSRLD mm,imm8 ; 0F 72 /2 ib [PENT,MMX]
PSRLD xmm1,xmm2/m128 ; 66 0F D2 /r [WILLAMETTE,SSE2]
PSRLD xmm,imm8 ; 66 0F 72 /2 ib [WILLAMETTE,SSE2]
PSRLQ mm1,mm2/m64 ; 0F D3 /r [PENT,MMX]
PSRLQ mm,imm8 ; 0F 73 /2 ib [PENT,MMX]
PSRLQ xmm1,xmm2/m128 ; 66 0F D3 /r [WILLAMETTE,SSE2]
PSRLQ xmm,imm8 ; 66 0F 73 /2 ib [WILLAMETTE,SSE2]
PSRLDQ xmm1,imm8 ; 66 0F 73 /3 ib [WILLAMETTE,SSE2]
PSRLx performs logical right shifts of the data elements in the
destination (first) operand, moving each bit in the separate elements
right by the number of bits specified in the source (second) operand,
clearing the high-order bits as they are vacated. PSRLDQ shifts bytes,
not bits.
- PSRLW shifts word sized elements.
- PSRLD shifts doubleword sized elements.
- PSRLQ shifts quadword sized elements.
- PSRLDQ shifts double quadword sized elements.