A.5.244 POP: Pop Data from Stack
POP reg16 ; o16 58+r [8086]
POP reg32 ; o32 58+r [386]
POP r/m16 ; o16 8F /0 [8086]
POP r/m32 ; o32 8F /0 [386]
POP CS ; 0F [8086,UNDOC]
POP DS ; 1F [8086]
POP ES ; 07 [8086]
POP SS ; 17 [8086]
POP FS ; 0F A1 [386]
POP GS ; 0F A9 [386]
POP loads a value from the stack (from [SS:SP] or [SS:ESP]) and then
increments the stack pointer.
The address-size attribute of the instruction determines whether SP or
ESP is used as the stack pointer: to deliberately override the default
given by the BITS setting, you can use an "a16" or "a32" prefix.
The operand-size attribute of the instruction determines whether the
stack pointer is incremented by 2 or 4: this means that segment register
pops in BITS 32 mode will pop 4 bytes off the stack and discard the
upper two of them. If you need to override that, you can use an "o16" or
"o32" prefix.
The above opcode listings give two forms for general-purpose register
pop instructions: for example, POP BX has the two forms 5B and 8F C3.
NASM will always generate the shorter form when given POP BX. NDISASM
will disassemble both.
POP CS is not a documented instruction, and is not supported on any
processor above the 8086 (since they use 0Fh as an opcode prefix for
instruction set extensions). However, at least some 8086 processors do
support it, and so NASM generates it for completeness. Current versions
of NASM silently accept this instruction.