A.5.243 PMVccZB: MMX Packed Conditional Move
PMVZB mmxreg,mem64 ; 0F 58 /r [CYRIX,MMX]
PMVNZB mmxreg,mem64 ; 0F 5A /r [CYRIX,MMX]
PMVLZB mmxreg,mem64 ; 0F 5B /r [CYRIX,MMX]
PMVGEZB mmxreg,mem64 ; 0F 5C /r [CYRIX,MMX]
These instructions, specific to the Cyrix MMX extensions, perform
parallel conditional moves. The two input operands are treated as
vectors of eight bytes. Each byte of the destination (first) operand
is either written from the corresponding byte of the source (second)
operand, or left alone, depending on the value of the byte in the
_implied_ operand (specified in the same way as PADDSIW, in section
A.5.200).
- PMVZB performs each move if the corresponding byte in the implied
operand is zero;
- PMVNZB moves if the byte is non-zero;
- PMVLZB moves if the byte is less than zero;
- PMVGEZB moves if the byte is greater than or equal to zero.
Note that these instructions cannot take a register as their second
source operand.