NASM 2.05 based x86 Instruction Reference[ch214]
A.5.191 OR: Bitwise OR OR r/m8,reg8 ; 08 /r [8086] OR r/m16,reg16 ; o16 09 /r [8086] OR r/m32,reg32 ; o32 09 /r [386] OR reg8,r/m8 ; 0A /r [8086] OR reg16,r/m16 ; o16 0B /r [8086] OR reg32,r/m32 ; o32 0B /r [386] OR r/m8,imm8 ; 80 /1 ib [8086] OR r/m16,imm16 ; o16 81 /1 iw [8086] OR r/m32,imm32 ; o32 81 /1 id [386] OR r/m16,imm8 ; o16 83 /1 ib [8086] OR r/m32,imm8 ; o32 83 /1 ib [386] OR AL,imm8 ; 0C ib [8086] OR AX,imm16 ; o16 0D iw [8086] OR EAX,imm32 ; o32 0D id [386] OR performs a bitwise OR operation between its two operands (i.e. each bit of the result is 1 if and only if at least one of the corresponding bits of the two inputs was 1), and stores the result in the destination (first) operand. In the forms with an 8-bit immediate second operand and a longer first operand, the second operand is considered to be signed, and is sign- extended to the length of the first operand. The BYTE qualifier can be used to force NASM to generate this form of the instruction. Recent versions of NASM automatically optimise to this form if the immediate operand's value is known during the assembling of that instruction, and fits in the range of a signed byte. The longer variant can then still be forced using the STRICT WORD or STRICT DWORD qualifier. The Carry Flag is cleared by OR. The Zero Flag is set according to whether the result is zero. The MMX instruction POR (see section A.5.247) performs the same operation on the 64-bit MMX registers.