A.5.156 MOV: Move Data
MOV r/m8,reg8 ; 88 /r [8086]
MOV r/m16,reg16 ; o16 89 /r [8086]
MOV r/m32,reg32 ; o32 89 /r [386]
MOV reg8,r/m8 ; 8A /r [8086]
MOV reg16,r/m16 ; o16 8B /r [8086]
MOV reg32,r/m32 ; o32 8B /r [386]
MOV reg8,imm8 ; B0+r ib [8086]
MOV reg16,imm16 ; o16 B8+r iw [8086]
MOV reg32,imm32 ; o32 B8+r id [386]
MOV r/m8,imm8 ; C6 /0 ib [8086]
MOV r/m16,imm16 ; o16 C7 /0 iw [8086]
MOV r/m32,imm32 ; o32 C7 /0 id [386]
MOV AL,memoffs8 ; A0 ow/od [8086]
MOV AX,memoffs16 ; o16 A1 ow/od [8086]
MOV EAX,memoffs32 ; o32 A1 ow/od [386]
MOV memoffs8,AL ; A2 ow/od [8086]
MOV memoffs16,AX ; o16 A3 ow/od [8086]
MOV memoffs32,EAX ; o32 A3 ow/od [386]
MOV r/m16,segreg ; o16 8C /r [8086]
MOV r/m32,segreg ; o32 8C /r [386]
MOV segreg,r/m16 ; o16 8E /r [8086]
MOV segreg,r/m32 ; o32 8E /r [386]
MOV reg32,CR0/2/3/4 ; 0F 20 /r [386]
MOV reg32,DR0/1/2/3/6/7 ; 0F 21 /r [386]
MOV reg32,TR3/4/5/6/7 ; 0F 24 /r [386]
MOV CR0/2/3/4,reg32 ; 0F 22 /r [386]
MOV DR0/1/2/3/6/7,reg32 ; 0F 23 /r [386]
MOV TR3/4/5/6/7,reg32 ; 0F 26 /r [386]
MOV copies the contents of its source (second) operand into its
destination (first) operand.
In all forms of the MOV instruction, the two operands are the same size,
except for moving between a segment register and an "r/m32" operand.
These instructions are treated exactly like the corresponding 16-bit
equivalent (so that, for example, MOV DS,EAX functions identically to
MOV DS,AX but saves a prefix when in 32-bit mode), except that when a
segment register is moved into a 32-bit destination, the top two bytes
of the result are undefined.
MOV may not use CS as a destination. However, this can be encoded, which
is silently accepted by current versions of NASM, and is decoded by
NDISASM.
CR4 is only a supported register on the Pentium and above.
Test registers are supported on 386/486 processors and on some non-Intel
Pentium class processors.