NASM 2.05 based x86 Instruction Reference[ch160]
A.5.139 LMSW: Load/Store Machine Status Word LMSW r/m16 ; 0F 01 /6 [286,PRIV] LMSW loads the bottom four bits of the source operand into the bottom four bits of the CR0 control register (or the Machine Status Word, on 286 processors). See also SMSW (section A.5.296).