NASM 2.05 based x86 Instruction Reference[ch135]
A.5.115 HLT: Halt Processor HLT ; F4 [8086,PRIV] HLT puts the processor into a halted state, where it will perform no more operations until restarted by an interrupt or a reset. On the 286 and later processors, this is a privileged instruction. This instruction, when supported, generally causes the CPU to idle, either by sleeping a certain amount of time, releasing a time slice in a multitasker, or actually halting until the next hardware interrupt occurs. Thus, executing HLT within an input loop after not receiving any new inputs allows to idle the system. DPMI environments may fault when trying to execute HLT, if the host does not support this usage. Calls such as interrupt 2Fh with AX=1680h must be used instead then.