A.5.112 FXSAVE: Store FP, MMX and SSE State
FXSAVE memory ; 0F AE /0 [P6,SSE,FPU]
The FXSAVE instruction writes the current FPU, MMX and SSE technology
states (environment and registers), to the 512 byte memory area defined
by the destination operand. It does this without checking for pending
unmasked floating-point exceptions (similar to the operation of FNSAVE).
Unlike the FSAVE/FNSAVE instructions, the processor retains the contents
of the FPU, MMX and SSE state in the processor after the state has been
saved. This instruction has been optimized to maximize floating-point
save performance.