A.5.72 FCMOVcc: Floating-Point Conditional Move
FCMOVB fpureg ; DA C0+r [P6,FPU]
FCMOVB ST0,fpureg ; DA C0+r [P6,FPU]
FCMOVE fpureg ; DA C8+r [P6,FPU]
FCMOVE ST0,fpureg ; DA C8+r [P6,FPU]
FCMOVBE fpureg ; DA D0+r [P6,FPU]
FCMOVBE ST0,fpureg ; DA D0+r [P6,FPU]
FCMOVU fpureg ; DA D8+r [P6,FPU]
FCMOVU ST0,fpureg ; DA D8+r [P6,FPU]
FCMOVNB fpureg ; DB C0+r [P6,FPU]
FCMOVNB ST0,fpureg ; DB C0+r [P6,FPU]
FCMOVNE fpureg ; DB C8+r [P6,FPU]
FCMOVNE ST0,fpureg ; DB C8+r [P6,FPU]
FCMOVNBE fpureg ; DB D0+r [P6,FPU]
FCMOVNBE ST0,fpureg ; DB D0+r [P6,FPU]
FCMOVNU fpureg ; DB D8+r [P6,FPU]
FCMOVNU ST0,fpureg ; DB D8+r [P6,FPU]
The U instructions perform conditional move operations: each of them
moves the contents of the given register into ST0 if its condition is
satisfied, and does nothing if not.
The conditions are not the same as the standard condition codes used
with conditional jump instructions. The conditions "B", "BE", "NB",
"NBE", "E" and "NE" are exactly as normal, but none of the other
standard ones are supported. Instead, the condition "U" and its
counterpart "NU" are provided; the "U" condition is satisfied if the
last two floating-point numbers compared were _unordered_, i.e. they
were not equal but neither one could be said to be greater than the
other, for example if they were NaNs. (The flag state which signals this
is the setting of the parity flag: so the "U" condition is notionally
equivalent to "PE", and "NU" is equivalent to "PO".)
The FCMOV conditions test the main processor's status flags, not the FPU
status flags, so using FCMOV directly after FCOM will not work. Instead,
you should either use FCOMI which writes directly to the main CPU flags
word, or use FSTSW to extract the FPU flags.
Although the FCMOV instructions are flagged P6 above, they may not be
supported by all Pentium Pro processors; the CPUID instruction (section
A.5.34) will return a bit which indicates whether conditional moves are
supported.