A.5.55 CVTTSD2SI: Scalar Double-Precision FP to Signed INT32 Conversion with
Truncation
CVTTSD2SI reg32,xmm/mem64 ; F2 0F 2C /r [WILLAMETTE,SSE2]
CVTTSD2SI converts a double-precision FP value in the source operand
to a signed doubleword in the destination operand. If the result is
inexact, it is truncated (rounded toward zero).
The destination operand is a general purpose register. The source can be
either an XMM register or a 64-bit memory location. If the source is a
register, the input value is in the low quadword.
For more details of this instruction, see the Intel Processor manuals.