NASM 2.05 based x86 Instruction Reference[ch071]
A.5.51 CVTTPD2DQ: Packed Double-Precision FP to Packed Signed INT32 Conversion with Truncation CVTTPD2DQ xmm1,xmm2/mem128 ; 66 0F E6 /r [WILLAMETTE,SSE2] CVTTPD2DQ converts two packed double-precision FP values in the source operand to two packed single-precision FP values in the destination operand. If the result is inexact, it is truncated (rounded toward zero). The high quadword is set to all 0s. The destination operand is an XMM register. The source can be either an XMM register or a 128-bit memory location. For more details of this instruction, see the Intel Processor manuals.