NASM 2.05 based x86 Instruction Reference[ch065]
A.5.45 CVTSD2SI: Scalar Double-Precision FP to Signed INT32 Conversion CVTSD2SI reg32,xmm/mem64 ; F2 0F 2D /r [WILLAMETTE,SSE2] CVTSD2SI converts a double-precision FP value from the source operand to a signed doubleword in the destination operand. The destination operand is a general purpose register. The source can be either an XMM register or a 64-bit memory location. If the source is a register, the input value is in the low quadword. For more details of this instruction, see the Intel Processor manuals.