NASM 2.05 based x86 Instruction Reference[ch057]
A.5.37 CVTPD2DQ: Packed Double-Precision FP to Packed Signed INT32 Conversion CVTPD2DQ xmm1,xmm2/mem128 ; F2 0F E6 /r [WILLAMETTE,SSE2] CVTPD2DQ converts two packed double-precision FP values from the source operand to two packed signed doublewords in the low quadword of the destination operand. The high quadword of the destination is set to all 0s. The destination operand is an XMM register. The source can be either an XMM register or a 128-bit memory location. For more details of this instruction, see the Intel Processor manuals.