A.5.23 CMOVcc: Conditional Move
CMOVcc reg16,r/m16 ; o16 0F 40+cc /r [P6]
CMOVcc reg32,r/m32 ; o32 0F 40+cc /r [P6]
CMOV moves its source (second) operand into its destination (first)
operand if the given condition code is satisfied; otherwise it does
nothing.
For a list of condition codes, see section A.2.2.
Although the CMOV instructions are flagged P6 and above, they may not be
supported by all Pentium Pro processors; the CPUID instruction (section
A.5.34) will return a bit which indicates whether conditional moves are
supported.